<!doctype html public "-//w3c//dtd html 4.0 transitional//en">
<html><head>
<title>Static Call Graph - [.\Objects\zhenyuan.axf]</title></head>
<body><HR>
<H1>Static Call Graph for image .\Objects\zhenyuan.axf</H1><HR>
<BR><P>#&#060CALLGRAPH&#062# ARM Linker, 5060750: Last Updated: Fri Oct 25 14:34:31 2024
<BR><P>
<H3>Maximum Stack Usage =        132 bytes + Unknown(Cycles, Untraceable Function Pointers)</H3><H3>
Call chain for Maximum Stack Depth:</H3>
__rt_entry_main &rArr; main &rArr; gd_eval_com_init1 &rArr; usart_baudrate_set &rArr; rcu_clock_freq_get
<P>
<H3>
Mutually Recursive functions
</H3> <LI><a href="#[a]">NMI_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[a]">NMI_Handler</a><BR>
 <LI><a href="#[b]">HardFault_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[b]">HardFault_Handler</a><BR>
 <LI><a href="#[c]">MemManage_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[c]">MemManage_Handler</a><BR>
 <LI><a href="#[d]">BusFault_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[d]">BusFault_Handler</a><BR>
 <LI><a href="#[e]">UsageFault_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[e]">UsageFault_Handler</a><BR>
 <LI><a href="#[f]">SVC_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[f]">SVC_Handler</a><BR>
 <LI><a href="#[10]">DebugMon_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[10]">DebugMon_Handler</a><BR>
 <LI><a href="#[11]">PendSV_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[11]">PendSV_Handler</a><BR>
 <LI><a href="#[25]">ADC0_1_IRQHandler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[25]">ADC0_1_IRQHandler</a><BR>
</UL>
<P>
<H3>
Function Pointers
</H3><UL>
 <LI><a href="#[25]">ADC0_1_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[d]">BusFault_Handler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[29]">CAN0_EWMC_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[27]">CAN0_RX0_IRQHandler</a> from app_can.o(i.CAN0_RX0_IRQHandler) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[28]">CAN0_RX1_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[26]">CAN0_TX_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[53]">CAN1_EWMC_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[51]">CAN1_RX0_IRQHandler</a> from app_can.o(i.CAN1_RX0_IRQHandler) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[52]">CAN1_RX1_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[50]">CAN1_TX_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[1e]">DMA0_Channel0_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[1f]">DMA0_Channel1_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[20]">DMA0_Channel2_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[21]">DMA0_Channel3_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[22]">DMA0_Channel4_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[23]">DMA0_Channel5_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[24]">DMA0_Channel6_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[49]">DMA1_Channel0_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[4a]">DMA1_Channel1_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[4b]">DMA1_Channel2_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[4c]">DMA1_Channel3_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[4d]">DMA1_Channel4_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[10]">DebugMon_Handler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[4e]">ENET_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[4f]">ENET_WKUP_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[42]">EXMC_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[19]">EXTI0_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[3b]">EXTI10_15_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[1a]">EXTI1_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[1b]">EXTI2_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[1c]">EXTI3_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[1d]">EXTI4_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[2a]">EXTI5_9_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[17]">FMC_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[b]">HardFault_Handler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[33]">I2C0_ER_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[32]">I2C0_EV_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[35]">I2C1_ER_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[34]">I2C1_EV_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[14]">LVD_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[c]">MemManage_Handler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[a]">NMI_Handler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[11]">PendSV_Handler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[18]">RCU_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[3c]">RTC_Alarm_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[16]">RTC_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[9]">Reset_Handler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[36]">SPI0_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[37]">SPI1_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[44]">SPI2_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[f]">SVC_Handler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[12]">SysTick_Handler</a> from app_tick.o(i.SysTick_Handler) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[55]">SystemInit</a> from system_gd32f10x.o(i.SystemInit) referenced from startup_gd32f10x_cl.o(.text)
 <LI><a href="#[15]">TAMPER_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[2b]">TIMER0_BRK_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[2e]">TIMER0_Channel_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[2d]">TIMER0_TRG_CMT_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[2c]">TIMER0_UP_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[2f]">TIMER1_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[30]">TIMER2_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[31]">TIMER3_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[43]">TIMER4_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[47]">TIMER5_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[48]">TIMER6_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[3e]">TIMER7_BRK_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[41]">TIMER7_Channel_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[40]">TIMER7_TRG_CMT_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[3f]">TIMER7_UP_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[45]">UART3_IRQHandler</a> from usart.o(i.UART3_IRQHandler) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[46]">UART4_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[38]">USART0_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[39]">USART1_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[3a]">USART2_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[54]">USBFS_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[3d]">USBFS_WKUP_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[e]">UsageFault_Handler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[13]">WWDGT_IRQHandler</a> from startup_gd32f10x_cl.o(.text) referenced from startup_gd32f10x_cl.o(RESET)
 <LI><a href="#[61]">__main</a> from __main.o(!!!main) referenced from startup_gd32f10x_cl.o(.text)
 <LI><a href="#[5a]">app_can_clear_tx_queue1_first_msg</a> from app_can.o(i.app_can_clear_tx_queue1_first_msg) referenced from app_can.o(.data)
 <LI><a href="#[60]">app_can_clear_tx_queue2_first_msg</a> from app_can.o(i.app_can_clear_tx_queue2_first_msg) referenced from app_can.o(.data)
 <LI><a href="#[5b]">app_can_get_rx_queue_mes</a> from app_can.o(i.app_can_get_rx_queue_mes) referenced 2 times from app_can.o(.data)
 <LI><a href="#[58]">app_can_get_tx_queue1_mes</a> from app_can.o(i.app_can_get_tx_queue1_mes) referenced from app_can.o(.data)
 <LI><a href="#[5e]">app_can_get_tx_queue2_mes</a> from app_can.o(i.app_can_get_tx_queue2_mes) referenced from app_can.o(.data)
 <LI><a href="#[5c]">app_can_set_rx_queue_mes</a> from app_can.o(i.app_can_set_rx_queue_mes) referenced 2 times from app_can.o(.data)
 <LI><a href="#[59]">app_can_set_tx_queue1_mes</a> from app_can.o(i.app_can_set_tx_queue1_mes) referenced from app_can.o(.data)
 <LI><a href="#[5f]">app_can_set_tx_queue2_mes</a> from app_can.o(i.app_can_set_tx_queue2_mes) referenced from app_can.o(.data)
 <LI><a href="#[57]">dri_can0_init</a> from dri_can.o(i.dri_can0_init) referenced from app_can.o(.data)
 <LI><a href="#[5d]">dri_can1_init</a> from dri_can.o(i.dri_can1_init) referenced from app_can.o(.data)
</UL>
<P>
<H3>
Global Symbols
</H3>
<P><STRONG><a name="[61]"></a>__main</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, __main.o(!!!main))
<BR><BR>[Calls]<UL><LI><a href="#[62]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload
<LI><a href="#[63]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_entry
</UL>

<P><STRONG><a name="[62]"></a>__scatterload</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __scatter.o(!!!scatter))
<BR><BR>[Called By]<UL><LI><a href="#[61]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__main
</UL>

<P><STRONG><a name="[64]"></a>__scatterload_rt2</STRONG> (Thumb, 44 bytes, Stack size unknown bytes, __scatter.o(!!!scatter), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[63]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_entry
</UL>

<P><STRONG><a name="[be]"></a>__scatterload_rt2_thumb_only</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __scatter.o(!!!scatter), UNUSED)

<P><STRONG><a name="[bf]"></a>__scatterload_null</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __scatter.o(!!!scatter), UNUSED)

<P><STRONG><a name="[65]"></a>__scatterload_copy</STRONG> (Thumb, 26 bytes, Stack size unknown bytes, __scatter_copy.o(!!handler_copy), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[65]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload_copy
</UL>
<BR>[Called By]<UL><LI><a href="#[65]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload_copy
</UL>

<P><STRONG><a name="[c0]"></a>__scatterload_zeroinit</STRONG> (Thumb, 28 bytes, Stack size unknown bytes, __scatter_zi.o(!!handler_zi), UNUSED)

<P><STRONG><a name="[6b]"></a>__rt_lib_init</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit.o(.ARM.Collect$$libinit$$00000000))
<BR><BR>[Called By]<UL><LI><a href="#[6a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_entry_li
</UL>

<P><STRONG><a name="[c1]"></a>__rt_lib_init_fp_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000002))

<P><STRONG><a name="[66]"></a>__rt_lib_init_heap_2</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000005))
<BR><BR>[Stack]<UL><LI>Max Depth = 64 + Unknown Stack Size
<LI>Call Chain = __rt_lib_init_heap_2 &rArr; _init_alloc &rArr; __rt_SIGRTMEM &rArr; __rt_SIGRTMEM_inner &rArr; __default_signal_display &rArr; _ttywrch
</UL>
<BR>[Calls]<UL><LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_init_alloc
</UL>

<P><STRONG><a name="[c2]"></a>__rt_lib_init_preinit_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000004))

<P><STRONG><a name="[c3]"></a>__rt_lib_init_alloca_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000002E))

<P><STRONG><a name="[c4]"></a>__rt_lib_init_argv_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000002C))

<P><STRONG><a name="[c5]"></a>__rt_lib_init_atexit_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000001B))

<P><STRONG><a name="[c6]"></a>__rt_lib_init_clock_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000021))

<P><STRONG><a name="[c7]"></a>__rt_lib_init_cpp_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000032))

<P><STRONG><a name="[c8]"></a>__rt_lib_init_exceptions_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000030))

<P><STRONG><a name="[c9]"></a>__rt_lib_init_fp_trap_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000001F))

<P><STRONG><a name="[ca]"></a>__rt_lib_init_getenv_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000023))

<P><STRONG><a name="[cb]"></a>__rt_lib_init_heap_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000000A))

<P><STRONG><a name="[cc]"></a>__rt_lib_init_lc_collate_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000011))

<P><STRONG><a name="[cd]"></a>__rt_lib_init_lc_ctype_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000013))

<P><STRONG><a name="[ce]"></a>__rt_lib_init_lc_monetary_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000015))

<P><STRONG><a name="[cf]"></a>__rt_lib_init_lc_numeric_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000017))

<P><STRONG><a name="[d0]"></a>__rt_lib_init_lc_time_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000019))

<P><STRONG><a name="[d1]"></a>__rt_lib_init_rand_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000000E))

<P><STRONG><a name="[d2]"></a>__rt_lib_init_return</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000033))

<P><STRONG><a name="[d3]"></a>__rt_lib_init_signal_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000001D))

<P><STRONG><a name="[d4]"></a>__rt_lib_init_stdio_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000025))

<P><STRONG><a name="[d5]"></a>__rt_lib_init_user_alloc_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000000C))

<P><STRONG><a name="[70]"></a>__rt_lib_shutdown</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libshutdown.o(.ARM.Collect$$libshutdown$$00000000))
<BR><BR>[Called By]<UL><LI><a href="#[6f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_exit_ls
<LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;abort
</UL>

<P><STRONG><a name="[d6]"></a>__rt_lib_shutdown_cpp_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$00000002))

<P><STRONG><a name="[d7]"></a>__rt_lib_shutdown_fp_trap_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$00000007))

<P><STRONG><a name="[d8]"></a>__rt_lib_shutdown_heap_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$0000000F))

<P><STRONG><a name="[d9]"></a>__rt_lib_shutdown_return</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$00000010))

<P><STRONG><a name="[da]"></a>__rt_lib_shutdown_signal_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$0000000A))

<P><STRONG><a name="[db]"></a>__rt_lib_shutdown_stdio_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$00000004))

<P><STRONG><a name="[dc]"></a>__rt_lib_shutdown_user_alloc_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$0000000C))

<P><STRONG><a name="[63]"></a>__rt_entry</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __rtentry.o(.ARM.Collect$$rtentry$$00000000))
<BR><BR>[Called By]<UL><LI><a href="#[64]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload_rt2
<LI><a href="#[61]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__main
</UL>

<P><STRONG><a name="[dd]"></a>__rt_entry_presh_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __rtentry2.o(.ARM.Collect$$rtentry$$00000002))

<P><STRONG><a name="[68]"></a>__rt_entry_sh</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __rtentry4.o(.ARM.Collect$$rtentry$$00000004))
<BR><BR>[Stack]<UL><LI>Max Depth = 8 + Unknown Stack Size
<LI>Call Chain = __rt_entry_sh &rArr; __user_setup_stackheap
</UL>
<BR>[Calls]<UL><LI><a href="#[69]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__user_setup_stackheap
</UL>

<P><STRONG><a name="[6a]"></a>__rt_entry_li</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __rtentry2.o(.ARM.Collect$$rtentry$$0000000A))
<BR><BR>[Calls]<UL><LI><a href="#[6b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_lib_init
</UL>

<P><STRONG><a name="[de]"></a>__rt_entry_postsh_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __rtentry2.o(.ARM.Collect$$rtentry$$00000009))

<P><STRONG><a name="[6c]"></a>__rt_entry_main</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __rtentry2.o(.ARM.Collect$$rtentry$$0000000D))
<BR><BR>[Stack]<UL><LI>Max Depth = 132 + Unknown Stack Size
<LI>Call Chain = __rt_entry_main &rArr; main &rArr; gd_eval_com_init1 &rArr; usart_baudrate_set &rArr; rcu_clock_freq_get
</UL>
<BR>[Calls]<UL><LI><a href="#[6d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
<LI><a href="#[6e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;exit
</UL>

<P><STRONG><a name="[df]"></a>__rt_entry_postli_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, __rtentry2.o(.ARM.Collect$$rtentry$$0000000C))

<P><STRONG><a name="[87]"></a>__rt_exit</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, rtexit.o(.ARM.Collect$$rtexit$$00000000))
<BR><BR>[Called By]<UL><LI><a href="#[6e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;exit
</UL>

<P><STRONG><a name="[6f]"></a>__rt_exit_ls</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, rtexit2.o(.ARM.Collect$$rtexit$$00000003))
<BR><BR>[Calls]<UL><LI><a href="#[70]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_lib_shutdown
</UL>

<P><STRONG><a name="[e0]"></a>__rt_exit_prels_1</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, rtexit2.o(.ARM.Collect$$rtexit$$00000002))

<P><STRONG><a name="[71]"></a>__rt_exit_exit</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, rtexit2.o(.ARM.Collect$$rtexit$$00000004))
<BR><BR>[Calls]<UL><LI><a href="#[72]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_sys_exit
</UL>

<P><STRONG><a name="[9]"></a>Reset_Handler</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[e1]"></a>_maybe_terminate_alloc</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, maybetermalloc1.o(.emb_text), UNUSED)

<P><STRONG><a name="[a]"></a>NMI_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR><BR>[Calls]<UL><LI><a href="#[a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NMI_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NMI_Handler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[b]"></a>HardFault_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR><BR>[Calls]<UL><LI><a href="#[b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HardFault_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HardFault_Handler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[c]"></a>MemManage_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR><BR>[Calls]<UL><LI><a href="#[c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MemManage_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MemManage_Handler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[d]"></a>BusFault_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR><BR>[Calls]<UL><LI><a href="#[d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BusFault_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BusFault_Handler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[e]"></a>UsageFault_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR><BR>[Calls]<UL><LI><a href="#[e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UsageFault_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UsageFault_Handler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[f]"></a>SVC_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR><BR>[Calls]<UL><LI><a href="#[f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SVC_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SVC_Handler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[10]"></a>DebugMon_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR><BR>[Calls]<UL><LI><a href="#[10]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DebugMon_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[10]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DebugMon_Handler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[11]"></a>PendSV_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR><BR>[Calls]<UL><LI><a href="#[11]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;PendSV_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[11]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;PendSV_Handler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[25]"></a>ADC0_1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR><BR>[Calls]<UL><LI><a href="#[25]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC0_1_IRQHandler
</UL>
<BR>[Called By]<UL><LI><a href="#[25]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC0_1_IRQHandler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[29]"></a>CAN0_EWMC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[28]"></a>CAN0_RX1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[26]"></a>CAN0_TX_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[53]"></a>CAN1_EWMC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[52]"></a>CAN1_RX1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[50]"></a>CAN1_TX_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[1e]"></a>DMA0_Channel0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[1f]"></a>DMA0_Channel1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[20]"></a>DMA0_Channel2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[21]"></a>DMA0_Channel3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[22]"></a>DMA0_Channel4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[23]"></a>DMA0_Channel5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[24]"></a>DMA0_Channel6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[49]"></a>DMA1_Channel0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[4a]"></a>DMA1_Channel1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[4b]"></a>DMA1_Channel2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[4c]"></a>DMA1_Channel3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[4d]"></a>DMA1_Channel4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[4e]"></a>ENET_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[4f]"></a>ENET_WKUP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[42]"></a>EXMC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[19]"></a>EXTI0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[3b]"></a>EXTI10_15_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[1a]"></a>EXTI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[1b]"></a>EXTI2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[1c]"></a>EXTI3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[1d]"></a>EXTI4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[2a]"></a>EXTI5_9_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[17]"></a>FMC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[33]"></a>I2C0_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[32]"></a>I2C0_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[35]"></a>I2C1_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[34]"></a>I2C1_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[14]"></a>LVD_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[18]"></a>RCU_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[3c]"></a>RTC_Alarm_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[16]"></a>RTC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[36]"></a>SPI0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[37]"></a>SPI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[44]"></a>SPI2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[15]"></a>TAMPER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[2b]"></a>TIMER0_BRK_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[2e]"></a>TIMER0_Channel_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[2d]"></a>TIMER0_TRG_CMT_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[2c]"></a>TIMER0_UP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[2f]"></a>TIMER1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[30]"></a>TIMER2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[31]"></a>TIMER3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[43]"></a>TIMER4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[47]"></a>TIMER5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[48]"></a>TIMER6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[3e]"></a>TIMER7_BRK_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[41]"></a>TIMER7_Channel_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[40]"></a>TIMER7_TRG_CMT_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[3f]"></a>TIMER7_UP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[46]"></a>UART4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[38]"></a>USART0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[39]"></a>USART1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[3a]"></a>USART2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[54]"></a>USBFS_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[3d]"></a>USBFS_WKUP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[13]"></a>WWDGT_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[86]"></a>__user_initial_stackheap</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, startup_gd32f10x_cl.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[69]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__user_setup_stackheap
</UL>

<P><STRONG><a name="[73]"></a>malloc</STRONG> (Thumb, 94 bytes, Stack size 16 bytes, h1_alloc.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 48<LI>Call Chain = malloc &rArr; __Heap_Full &rArr; __Heap_ProvideMemory &rArr; free
</UL>
<BR>[Calls]<UL><LI><a href="#[75]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__Heap_Full
<LI><a href="#[74]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_heap_descriptor
</UL>
<BR>[Called By]<UL><LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;read_set_info
<LI><a href="#[b5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;read_real_info
</UL>

<P><STRONG><a name="[76]"></a>free</STRONG> (Thumb, 78 bytes, Stack size 16 bytes, h1_free.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = free
</UL>
<BR>[Calls]<UL><LI><a href="#[74]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_heap_descriptor
</UL>
<BR>[Called By]<UL><LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;read_set_info
<LI><a href="#[b5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;read_real_info
<LI><a href="#[7c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__Heap_ProvideMemory
</UL>

<P><STRONG><a name="[77]"></a>__aeabi_assert</STRONG> (Thumb, 86 bytes, Stack size 16 bytes, assert.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 64 + Unknown Stack Size
<LI>Call Chain = __aeabi_assert &rArr; abort &rArr; __rt_SIGABRT &rArr; __rt_SIGABRT_inner &rArr; __default_signal_display &rArr; _ttywrch
</UL>
<BR>[Calls]<UL><LI><a href="#[78]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__assert_puts
<LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;abort
</UL>
<BR>[Called By]<UL><LI><a href="#[b6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;reg204
<LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;reg200
</UL>

<P><STRONG><a name="[e2]"></a>__assert</STRONG> (Thumb, 0 bytes, Stack size 16 bytes, assert.o(.text), UNUSED)

<P><STRONG><a name="[94]"></a>__aeabi_memcpy</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, rt_memcpy_v6.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[93]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;app_mp_send_data
</UL>

<P><STRONG><a name="[7a]"></a>__rt_memcpy</STRONG> (Thumb, 138 bytes, Stack size 0 bytes, rt_memcpy_v6.o(.text), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[7b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memcpy4
</UL>

<P><STRONG><a name="[e3]"></a>_memcpy_lastbytes</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, rt_memcpy_v6.o(.text), UNUSED)

<P><STRONG><a name="[7b]"></a>__aeabi_memcpy4</STRONG> (Thumb, 0 bytes, Stack size 8 bytes, rt_memcpy_w.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = __aeabi_memcpy4
</UL>
<BR>[Called By]<UL><LI><a href="#[7a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_memcpy
<LI><a href="#[5f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;app_can_set_tx_queue2_mes
<LI><a href="#[59]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;app_can_set_tx_queue1_mes
<LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;app_can_set_rx_queue_mes
<LI><a href="#[5e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;app_can_get_tx_queue2_mes
<LI><a href="#[58]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;app_can_get_tx_queue1_mes
<LI><a href="#[5b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;app_can_get_rx_queue_mes
</UL>

<P><STRONG><a name="[e4]"></a>__aeabi_memcpy8</STRONG> (Thumb, 0 bytes, Stack size 8 bytes, rt_memcpy_w.o(.text), UNUSED)

<P><STRONG><a name="[e5]"></a>__rt_memcpy_w</STRONG> (Thumb, 100 bytes, Stack size 8 bytes, rt_memcpy_w.o(.text), UNUSED)

<P><STRONG><a name="[e6]"></a>_memcpy_lastbytes_aligned</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, rt_memcpy_w.o(.text), UNUSED)

<P><STRONG><a name="[89]"></a>__aeabi_memclr4</STRONG> (Thumb, 0 bytes, Stack size 4 bytes, rt_memclr_w.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = __aeabi_memclr4
</UL>
<BR>[Called By]<UL><LI><a href="#[51]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN1_RX0_IRQHandler
<LI><a href="#[27]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN0_RX0_IRQHandler
<LI><a href="#[5b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;app_can_get_rx_queue_mes
<LI><a href="#[60]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;app_can_clear_tx_queue2_first_msg
<LI><a href="#[5a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;app_can_clear_tx_queue1_first_msg
</UL>

<P><STRONG><a name="[e7]"></a>__aeabi_memclr8</STRONG> (Thumb, 0 bytes, Stack size 4 bytes, rt_memclr_w.o(.text), UNUSED)

<P><STRONG><a name="[e8]"></a>__rt_memclr_w</STRONG> (Thumb, 78 bytes, Stack size 4 bytes, rt_memclr_w.o(.text), UNUSED)

<P><STRONG><a name="[e9]"></a>_memset_w</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, rt_memclr_w.o(.text), UNUSED)

<P><STRONG><a name="[ea]"></a>__use_two_region_memory</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, heapauxi.o(.text), UNUSED)

<P><STRONG><a name="[2]"></a>__rt_heap_escrow</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, heapauxi.o(.text), UNUSED)

<P><STRONG><a name="[1]"></a>__rt_heap_expand</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, heapauxi.o(.text), UNUSED)

<P><STRONG><a name="[74]"></a>__rt_heap_descriptor</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, rt_heap_descriptor_intlibspace.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_init_alloc
<LI><a href="#[76]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;free
<LI><a href="#[73]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;malloc
</UL>

<P><STRONG><a name="[eb]"></a>__use_no_heap</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, hguard.o(.text), UNUSED)

<P><STRONG><a name="[ec]"></a>__heap$guard</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, hguard.o(.text), UNUSED)

<P><STRONG><a name="[7]"></a>_terminate_user_alloc</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, init_alloc.o(.text), UNUSED)

<P><STRONG><a name="[5]"></a>_init_user_alloc</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, init_alloc.o(.text), UNUSED)

<P><STRONG><a name="[75]"></a>__Heap_Full</STRONG> (Thumb, 34 bytes, Stack size 16 bytes, init_alloc.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = __Heap_Full &rArr; __Heap_ProvideMemory &rArr; free
</UL>
<BR>[Calls]<UL><LI><a href="#[7c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__Heap_ProvideMemory
</UL>
<BR>[Called By]<UL><LI><a href="#[73]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;malloc
</UL>

<P><STRONG><a name="[7d]"></a>__Heap_Broken</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, init_alloc.o(.text), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[7e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_SIGRTMEM
</UL>

<P><STRONG><a name="[67]"></a>_init_alloc</STRONG> (Thumb, 94 bytes, Stack size 24 bytes, init_alloc.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = _init_alloc &rArr; __rt_SIGRTMEM &rArr; __rt_SIGRTMEM_inner &rArr; __default_signal_display &rArr; _ttywrch
</UL>
<BR>[Calls]<UL><LI><a href="#[7e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_SIGRTMEM
<LI><a href="#[7c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__Heap_ProvideMemory
<LI><a href="#[7f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__Heap_Initialize
<LI><a href="#[74]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_heap_descriptor
</UL>
<BR>[Called By]<UL><LI><a href="#[66]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_lib_init_heap_2
</UL>

<P><STRONG><a name="[7f]"></a>__Heap_Initialize</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, h1_init.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_init_alloc
</UL>

<P><STRONG><a name="[3]"></a>__Heap_DescSize</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, h1_init.o(.text), UNUSED)

<P><STRONG><a name="[79]"></a>abort</STRONG> (Thumb, 22 bytes, Stack size 8 bytes, abort.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 48 + Unknown Stack Size
<LI>Call Chain = abort &rArr; __rt_SIGABRT &rArr; __rt_SIGABRT_inner &rArr; __default_signal_display &rArr; _ttywrch
</UL>
<BR>[Calls]<UL><LI><a href="#[70]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_lib_shutdown
<LI><a href="#[80]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_SIGABRT
<LI><a href="#[72]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_sys_exit
</UL>
<BR>[Called By]<UL><LI><a href="#[77]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_assert
</UL>

<P><STRONG><a name="[78]"></a>__assert_puts</STRONG> (Thumb, 20 bytes, Stack size 8 bytes, assert_puts.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = __assert_puts &rArr; _ttywrch
</UL>
<BR>[Calls]<UL><LI><a href="#[81]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_ttywrch
</UL>
<BR>[Called By]<UL><LI><a href="#[77]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_assert
</UL>

<P><STRONG><a name="[81]"></a>_ttywrch</STRONG> (Thumb, 14 bytes, Stack size 8 bytes, sys_wrch.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = _ttywrch
</UL>
<BR>[Called By]<UL><LI><a href="#[88]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__default_signal_display
<LI><a href="#[78]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__assert_puts
</UL>

<P><STRONG><a name="[72]"></a>_sys_exit</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, sys_exit.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[71]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_exit_exit
<LI><a href="#[83]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__sig_exit
<LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;abort
</UL>

<P><STRONG><a name="[ed]"></a>__user_libspace</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, libspace.o(.text), UNUSED)

<P><STRONG><a name="[85]"></a>__user_perproc_libspace</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, libspace.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[69]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__user_setup_stackheap
</UL>

<P><STRONG><a name="[ee]"></a>__user_perthread_libspace</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, libspace.o(.text), UNUSED)

<P><STRONG><a name="[7c]"></a>__Heap_ProvideMemory</STRONG> (Thumb, 52 bytes, Stack size 0 bytes, h1_extend.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = __Heap_ProvideMemory &rArr; free
</UL>
<BR>[Calls]<UL><LI><a href="#[76]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;free
</UL>
<BR>[Called By]<UL><LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_init_alloc
<LI><a href="#[75]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__Heap_Full
</UL>

<P><STRONG><a name="[80]"></a>__rt_SIGABRT</STRONG> (Thumb, 14 bytes, Stack size 8 bytes, defsig_abrt_outer.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = __rt_SIGABRT &rArr; __rt_SIGABRT_inner &rArr; __default_signal_display &rArr; _ttywrch
</UL>
<BR>[Calls]<UL><LI><a href="#[82]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_SIGABRT_inner
<LI><a href="#[83]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__sig_exit
</UL>
<BR>[Called By]<UL><LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;abort
</UL>

<P><STRONG><a name="[7e]"></a>__rt_SIGRTMEM</STRONG> (Thumb, 14 bytes, Stack size 8 bytes, defsig_rtmem_outer.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = __rt_SIGRTMEM &rArr; __rt_SIGRTMEM_inner &rArr; __default_signal_display &rArr; _ttywrch
</UL>
<BR>[Calls]<UL><LI><a href="#[84]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_SIGRTMEM_inner
<LI><a href="#[83]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__sig_exit
</UL>
<BR>[Called By]<UL><LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_init_alloc
<LI><a href="#[7d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__Heap_Broken
</UL>

<P><STRONG><a name="[ef]"></a>__I$use$semihosting</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, use_no_semi.o(.text), UNUSED)

<P><STRONG><a name="[f0]"></a>__use_no_semihosting_swi</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, use_no_semi.o(.text), UNUSED)

<P><STRONG><a name="[f1]"></a>__semihosting_library_function</STRONG> (Thumb, 0 bytes, Stack size 8 bytes, indicate_semi.o(.text), UNUSED)

<P><STRONG><a name="[69]"></a>__user_setup_stackheap</STRONG> (Thumb, 74 bytes, Stack size 8 bytes, sys_stackheap_outer.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = __user_setup_stackheap
</UL>
<BR>[Calls]<UL><LI><a href="#[86]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__user_initial_stackheap
<LI><a href="#[85]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__user_perproc_libspace
</UL>
<BR>[Called By]<UL><LI><a href="#[68]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_entry_sh
</UL>

<P><STRONG><a name="[6e]"></a>exit</STRONG> (Thumb, 18 bytes, Stack size 8 bytes, exit.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 8 + Unknown Stack Size
<LI>Call Chain = exit
</UL>
<BR>[Calls]<UL><LI><a href="#[87]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_exit
</UL>
<BR>[Called By]<UL><LI><a href="#[6c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_entry_main
</UL>

<P><STRONG><a name="[83]"></a>__sig_exit</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, defsig_exit.o(.text))
<BR><BR>[Calls]<UL><LI><a href="#[72]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_sys_exit
</UL>
<BR>[Called By]<UL><LI><a href="#[7e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_SIGRTMEM
<LI><a href="#[80]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_SIGABRT
</UL>

<P><STRONG><a name="[82]"></a>__rt_SIGABRT_inner</STRONG> (Thumb, 14 bytes, Stack size 8 bytes, defsig_abrt_inner.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = __rt_SIGABRT_inner &rArr; __default_signal_display &rArr; _ttywrch
</UL>
<BR>[Calls]<UL><LI><a href="#[88]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__default_signal_display
</UL>
<BR>[Called By]<UL><LI><a href="#[80]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_SIGABRT
</UL>

<P><STRONG><a name="[84]"></a>__rt_SIGRTMEM_inner</STRONG> (Thumb, 22 bytes, Stack size 8 bytes, defsig_rtmem_inner.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = __rt_SIGRTMEM_inner &rArr; __default_signal_display &rArr; _ttywrch
</UL>
<BR>[Calls]<UL><LI><a href="#[88]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__default_signal_display
</UL>
<BR>[Called By]<UL><LI><a href="#[7e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_SIGRTMEM
</UL>

<P><STRONG><a name="[88]"></a>__default_signal_display</STRONG> (Thumb, 50 bytes, Stack size 16 bytes, defsig_general.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = __default_signal_display &rArr; _ttywrch
</UL>
<BR>[Calls]<UL><LI><a href="#[81]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_ttywrch
</UL>
<BR>[Called By]<UL><LI><a href="#[84]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_SIGRTMEM_inner
<LI><a href="#[82]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_SIGABRT_inner
</UL>

<P><STRONG><a name="[27]"></a>CAN0_RX0_IRQHandler</STRONG> (Thumb, 50 bytes, Stack size 32 bytes, app_can.o(i.CAN0_RX0_IRQHandler))
<BR><BR>[Stack]<UL><LI>Max Depth = 48<LI>Call Chain = CAN0_RX0_IRQHandler &rArr; app_can_set_rx_queue_mes &rArr; __aeabi_memcpy4
</UL>
<BR>[Calls]<UL><LI><a href="#[8a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_message_receive
<LI><a href="#[89]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4
<LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;app_can_set_rx_queue_mes
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[51]"></a>CAN1_RX0_IRQHandler</STRONG> (Thumb, 50 bytes, Stack size 32 bytes, app_can.o(i.CAN1_RX0_IRQHandler))
<BR><BR>[Stack]<UL><LI>Max Depth = 48<LI>Call Chain = CAN1_RX0_IRQHandler &rArr; app_can_set_rx_queue_mes &rArr; __aeabi_memcpy4
</UL>
<BR>[Calls]<UL><LI><a href="#[8a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_message_receive
<LI><a href="#[89]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4
<LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;app_can_set_rx_queue_mes
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[12]"></a>SysTick_Handler</STRONG> (Thumb, 8 bytes, Stack size 8 bytes, app_tick.o(i.SysTick_Handler))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = SysTick_Handler
</UL>
<BR>[Calls]<UL><LI><a href="#[8b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;app_timetick_poll
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[55]"></a>SystemInit</STRONG> (Thumb, 88 bytes, Stack size 8 bytes, system_gd32f10x.o(i.SystemInit))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = SystemInit &rArr; system_clock_config
</UL>
<BR>[Calls]<UL><LI><a href="#[8c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;system_clock_config
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(.text)
</UL>
<P><STRONG><a name="[45]"></a>UART3_IRQHandler</STRONG> (Thumb, 66 bytes, Stack size 8 bytes, usart.o(i.UART3_IRQHandler))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = UART3_IRQHandler &rArr; usart_flag_get
</UL>
<BR>[Calls]<UL><LI><a href="#[8d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_flag_get
<LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_interrupt_flag_clear
<LI><a href="#[8e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_data_receive
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_gd32f10x_cl.o(RESET)
</UL>
<P><STRONG><a name="[95]"></a>app_can_send_data</STRONG> (Thumb, 24 bytes, Stack size 16 bytes, app_can.o(i.app_can_send_data))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = app_can_send_data
</UL>
<BR>[Called By]<UL><LI><a href="#[93]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;app_mp_send_data
</UL>

<P><STRONG><a name="[90]"></a>app_can_task_poll</STRONG> (Thumb, 14 bytes, Stack size 8 bytes, app_can.o(i.app_can_task_poll))
<BR><BR>[Stack]<UL><LI>Max Depth = 52<LI>Call Chain = app_can_task_poll &rArr; can_send_queue &rArr; can_message_transmit
</UL>
<BR>[Calls]<UL><LI><a href="#[92]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_send_queue
<LI><a href="#[91]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_analyse
</UL>
<BR>[Called By]<UL><LI><a href="#[6d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[93]"></a>app_mp_send_data</STRONG> (Thumb, 52 bytes, Stack size 16 bytes, app_mp.o(i.app_mp_send_data))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = app_mp_send_data &rArr; app_can_send_data
</UL>
<BR>[Calls]<UL><LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;app_can_send_data
<LI><a href="#[94]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memcpy
</UL>
<BR>[Called By]<UL><LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;read_set_info
<LI><a href="#[b5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;read_real_info
</UL>

<P><STRONG><a name="[b2]"></a>app_tick_init</STRONG> (Thumb, 90 bytes, Stack size 12 bytes, app_tick.o(i.app_tick_init))
<BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = app_tick_init
</UL>
<BR>[Called By]<UL><LI><a href="#[6d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[96]"></a>app_timeout_judge</STRONG> (Thumb, 140 bytes, Stack size 4 bytes, app_timeout.o(i.app_timeout_judge))
<BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = app_timeout_judge
</UL>
<BR>[Calls]<UL><LI><a href="#[97]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;app_timeout_reset
</UL>
<BR>[Called By]<UL><LI><a href="#[b6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;reg204
<LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;reg200
<LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;read_set_info
<LI><a href="#[b5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;read_real_info
</UL>

<P><STRONG><a name="[97]"></a>app_timeout_reset</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, app_timeout.o(i.app_timeout_reset))
<BR><BR>[Called By]<UL><LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;app_timeout_judge
</UL>

<P><STRONG><a name="[8b]"></a>app_timetick_poll</STRONG> (Thumb, 12 bytes, Stack size 0 bytes, app_timeout.o(i.app_timetick_poll))
<BR><BR>[Called By]<UL><LI><a href="#[12]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_Handler
</UL>

<P><STRONG><a name="[98]"></a>can_deinit</STRONG> (Thumb, 28 bytes, Stack size 8 bytes, gd32f10x_can.o(i.can_deinit))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = can_deinit
</UL>
<BR>[Calls]<UL><LI><a href="#[99]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_periph_reset_enable
<LI><a href="#[9a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_periph_reset_disable
</UL>
<BR>[Called By]<UL><LI><a href="#[5d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dri_can1_init
<LI><a href="#[57]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dri_can0_init
</UL>

<P><STRONG><a name="[a2]"></a>can_filter_init</STRONG> (Thumb, 262 bytes, Stack size 8 bytes, gd32f10x_can.o(i.can_filter_init))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = can_filter_init
</UL>
<BR>[Called By]<UL><LI><a href="#[5d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dri_can1_init
<LI><a href="#[57]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dri_can0_init
</UL>

<P><STRONG><a name="[9b]"></a>can_gpio_config</STRONG> (Thumb, 104 bytes, Stack size 8 bytes, dri_can.o(i.can_gpio_config))
<BR><BR>[Stack]<UL><LI>Max Depth = 28<LI>Call Chain = can_gpio_config &rArr; gpio_pin_remap_config
</UL>
<BR>[Calls]<UL><LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_pin_remap_config
<LI><a href="#[9d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_init
<LI><a href="#[9c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_periph_clock_enable
</UL>
<BR>[Called By]<UL><LI><a href="#[5d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dri_can1_init
<LI><a href="#[57]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dri_can0_init
</UL>

<P><STRONG><a name="[a1]"></a>can_init</STRONG> (Thumb, 290 bytes, Stack size 16 bytes, gd32f10x_can.o(i.can_init))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = can_init
</UL>
<BR>[Called By]<UL><LI><a href="#[5d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dri_can1_init
<LI><a href="#[57]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dri_can0_init
</UL>

<P><STRONG><a name="[a3]"></a>can_interrupt_enable</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, gd32f10x_can.o(i.can_interrupt_enable))
<BR><BR>[Called By]<UL><LI><a href="#[5d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dri_can1_init
<LI><a href="#[57]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dri_can0_init
</UL>

<P><STRONG><a name="[8a]"></a>can_message_receive</STRONG> (Thumb, 228 bytes, Stack size 8 bytes, gd32f10x_can.o(i.can_message_receive))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = can_message_receive
</UL>
<BR>[Called By]<UL><LI><a href="#[51]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN1_RX0_IRQHandler
<LI><a href="#[27]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN0_RX0_IRQHandler
</UL>

<P><STRONG><a name="[9f]"></a>can_message_transmit</STRONG> (Thumb, 332 bytes, Stack size 12 bytes, gd32f10x_can.o(i.can_message_transmit))
<BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = can_message_transmit
</UL>
<BR>[Called By]<UL><LI><a href="#[92]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_send_queue
</UL>

<P><STRONG><a name="[b7]"></a>clean_rebuff</STRONG> (Thumb, 30 bytes, Stack size 0 bytes, usart.o(i.clean_rebuff))
<BR><BR>[Called By]<UL><LI><a href="#[b6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;reg204
<LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;reg200
<LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;read_set_info
<LI><a href="#[b5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;read_real_info
</UL>

<P><STRONG><a name="[b8]"></a>crc16</STRONG> (Thumb, 48 bytes, Stack size 16 bytes, app_crc.o(i.crc16))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = crc16
</UL>
<BR>[Called By]<UL><LI><a href="#[b6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;reg204
<LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;reg200
<LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;read_set_info
<LI><a href="#[b5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;read_real_info
</UL>

<P><STRONG><a name="[57]"></a>dri_can0_init</STRONG> (Thumb, 306 bytes, Stack size 56 bytes, dri_can.o(i.dri_can0_init))
<BR><BR>[Stack]<UL><LI>Max Depth = 84<LI>Call Chain = dri_can0_init &rArr; can_gpio_config &rArr; gpio_pin_remap_config
</UL>
<BR>[Calls]<UL><LI><a href="#[a3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_interrupt_enable
<LI><a href="#[a1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_init
<LI><a href="#[a2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_filter_init
<LI><a href="#[98]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_deinit
<LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nvic_irq_enable
<LI><a href="#[9b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_gpio_config
</UL>
<BR>[Address Reference Count : 1]<UL><LI> app_can.o(.data)
</UL>
<P><STRONG><a name="[5d]"></a>dri_can1_init</STRONG> (Thumb, 308 bytes, Stack size 56 bytes, dri_can.o(i.dri_can1_init))
<BR><BR>[Stack]<UL><LI>Max Depth = 84<LI>Call Chain = dri_can1_init &rArr; can_gpio_config &rArr; gpio_pin_remap_config
</UL>
<BR>[Calls]<UL><LI><a href="#[a3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_interrupt_enable
<LI><a href="#[a1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_init
<LI><a href="#[a2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_filter_init
<LI><a href="#[98]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_deinit
<LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nvic_irq_enable
<LI><a href="#[9b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_gpio_config
</UL>
<BR>[Address Reference Count : 1]<UL><LI> app_can.o(.data)
</UL>
<P><STRONG><a name="[a4]"></a>gd_eval_com_init1</STRONG> (Thumb, 182 bytes, Stack size 8 bytes, usart.o(i.gd_eval_com_init1))
<BR><BR>[Stack]<UL><LI>Max Depth = 132<LI>Call Chain = gd_eval_com_init1 &rArr; usart_baudrate_set &rArr; rcu_clock_freq_get
</UL>
<BR>[Calls]<UL><LI><a href="#[9d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_init
<LI><a href="#[b0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_bit_reset
<LI><a href="#[9c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_periph_clock_enable
<LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nvic_irq_enable
<LI><a href="#[a7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_word_length_set
<LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_transmit_config
<LI><a href="#[a8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_stop_bit_set
<LI><a href="#[ac]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_receive_config
<LI><a href="#[a9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_parity_config
<LI><a href="#[af]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_interrupt_enable
<LI><a href="#[aa]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_hardware_flow_rts_config
<LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_hardware_flow_cts_config
<LI><a href="#[ae]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_enable
<LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_deinit
<LI><a href="#[a6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_baudrate_set
</UL>
<BR>[Called By]<UL><LI><a href="#[6d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[b0]"></a>gpio_bit_reset</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, gd32f10x_gpio.o(i.gpio_bit_reset))
<BR><BR>[Called By]<UL><LI><a href="#[b6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;reg204
<LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;reg200
<LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;read_set_info
<LI><a href="#[b5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;read_real_info
<LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_eval_com_init1
</UL>

<P><STRONG><a name="[b9]"></a>gpio_bit_set</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, gd32f10x_gpio.o(i.gpio_bit_set))
<BR><BR>[Called By]<UL><LI><a href="#[b6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;reg204
<LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;reg200
<LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;read_set_info
<LI><a href="#[b5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;read_real_info
</UL>

<P><STRONG><a name="[9d]"></a>gpio_init</STRONG> (Thumb, 172 bytes, Stack size 20 bytes, gd32f10x_gpio.o(i.gpio_init))
<BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = gpio_init
</UL>
<BR>[Called By]<UL><LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_eval_com_init1
<LI><a href="#[9b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_gpio_config
</UL>

<P><STRONG><a name="[9e]"></a>gpio_pin_remap_config</STRONG> (Thumb, 138 bytes, Stack size 20 bytes, gd32f10x_gpio.o(i.gpio_pin_remap_config))
<BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = gpio_pin_remap_config
</UL>
<BR>[Called By]<UL><LI><a href="#[9b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_gpio_config
</UL>

<P><STRONG><a name="[6d]"></a>main</STRONG> (Thumb, 54 bytes, Stack size 0 bytes, main.o(i.main))
<BR><BR>[Stack]<UL><LI>Max Depth = 132 + Unknown Stack Size
<LI>Call Chain = main &rArr; gd_eval_com_init1 &rArr; usart_baudrate_set &rArr; rcu_clock_freq_get
</UL>
<BR>[Calls]<UL><LI><a href="#[b6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;reg204
<LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;reg200
<LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;read_set_info
<LI><a href="#[b5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;read_real_info
<LI><a href="#[b1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nvic_priority_group_set
<LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_eval_com_init1
<LI><a href="#[b2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;app_tick_init
<LI><a href="#[90]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;app_can_task_poll
</UL>
<BR>[Called By]<UL><LI><a href="#[6c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_entry_main
</UL>

<P><STRONG><a name="[a0]"></a>nvic_irq_enable</STRONG> (Thumb, 162 bytes, Stack size 24 bytes, gd32f10x_misc.o(i.nvic_irq_enable))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = nvic_irq_enable
</UL>
<BR>[Calls]<UL><LI><a href="#[b1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nvic_priority_group_set
</UL>
<BR>[Called By]<UL><LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_eval_com_init1
<LI><a href="#[5d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dri_can1_init
<LI><a href="#[57]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dri_can0_init
</UL>

<P><STRONG><a name="[b1]"></a>nvic_priority_group_set</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, gd32f10x_misc.o(i.nvic_priority_group_set))
<BR><BR>[Called By]<UL><LI><a href="#[6d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
<LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;nvic_irq_enable
</UL>

<P><STRONG><a name="[bd]"></a>rcu_clock_freq_get</STRONG> (Thumb, 334 bytes, Stack size 92 bytes, gd32f10x_rcu.o(i.rcu_clock_freq_get))
<BR><BR>[Stack]<UL><LI>Max Depth = 92<LI>Call Chain = rcu_clock_freq_get
</UL>
<BR>[Called By]<UL><LI><a href="#[a6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_baudrate_set
</UL>

<P><STRONG><a name="[9c]"></a>rcu_periph_clock_enable</STRONG> (Thumb, 28 bytes, Stack size 0 bytes, gd32f10x_rcu.o(i.rcu_periph_clock_enable))
<BR><BR>[Called By]<UL><LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_eval_com_init1
<LI><a href="#[9b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_gpio_config
</UL>

<P><STRONG><a name="[9a]"></a>rcu_periph_reset_disable</STRONG> (Thumb, 28 bytes, Stack size 0 bytes, gd32f10x_rcu.o(i.rcu_periph_reset_disable))
<BR><BR>[Called By]<UL><LI><a href="#[98]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_deinit
<LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_deinit
</UL>

<P><STRONG><a name="[99]"></a>rcu_periph_reset_enable</STRONG> (Thumb, 28 bytes, Stack size 0 bytes, gd32f10x_rcu.o(i.rcu_periph_reset_enable))
<BR><BR>[Called By]<UL><LI><a href="#[98]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_deinit
<LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_deinit
</UL>

<P><STRONG><a name="[b5]"></a>read_real_info</STRONG> (Thumb, 312 bytes, Stack size 24 bytes, usart.o(i.read_real_info))
<BR><BR>[Stack]<UL><LI>Max Depth = 72<LI>Call Chain = read_real_info &rArr; malloc &rArr; __Heap_Full &rArr; __Heap_ProvideMemory &rArr; free
</UL>
<BR>[Calls]<UL><LI><a href="#[8d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_flag_get
<LI><a href="#[ba]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_data_transmit
<LI><a href="#[b9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_bit_set
<LI><a href="#[b0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_bit_reset
<LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;crc16
<LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;app_timeout_judge
<LI><a href="#[93]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;app_mp_send_data
<LI><a href="#[bb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;swapBytes
<LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;clean_rebuff
<LI><a href="#[76]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;free
<LI><a href="#[73]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;malloc
</UL>
<BR>[Called By]<UL><LI><a href="#[6d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[b4]"></a>read_set_info</STRONG> (Thumb, 290 bytes, Stack size 24 bytes, usart.o(i.read_set_info))
<BR><BR>[Stack]<UL><LI>Max Depth = 72<LI>Call Chain = read_set_info &rArr; malloc &rArr; __Heap_Full &rArr; __Heap_ProvideMemory &rArr; free
</UL>
<BR>[Calls]<UL><LI><a href="#[8d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_flag_get
<LI><a href="#[ba]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_data_transmit
<LI><a href="#[b9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_bit_set
<LI><a href="#[b0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_bit_reset
<LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;crc16
<LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;app_timeout_judge
<LI><a href="#[93]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;app_mp_send_data
<LI><a href="#[bb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;swapBytes
<LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;clean_rebuff
<LI><a href="#[76]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;free
<LI><a href="#[73]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;malloc
</UL>
<BR>[Called By]<UL><LI><a href="#[6d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[b3]"></a>reg200</STRONG> (Thumb, 304 bytes, Stack size 24 bytes, usart.o(i.reg200))
<BR><BR>[Stack]<UL><LI>Max Depth = 88 + Unknown Stack Size
<LI>Call Chain = reg200 &rArr; __aeabi_assert &rArr; abort &rArr; __rt_SIGABRT &rArr; __rt_SIGABRT_inner &rArr; __default_signal_display &rArr; _ttywrch
</UL>
<BR>[Calls]<UL><LI><a href="#[8d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_flag_get
<LI><a href="#[ba]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_data_transmit
<LI><a href="#[b9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_bit_set
<LI><a href="#[b0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_bit_reset
<LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;crc16
<LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;app_timeout_judge
<LI><a href="#[bb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;swapBytes
<LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;clean_rebuff
<LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_interrupt_flag_clear
<LI><a href="#[77]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_assert
</UL>
<BR>[Called By]<UL><LI><a href="#[6d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[b6]"></a>reg204</STRONG> (Thumb, 270 bytes, Stack size 24 bytes, usart.o(i.reg204))
<BR><BR>[Stack]<UL><LI>Max Depth = 88 + Unknown Stack Size
<LI>Call Chain = reg204 &rArr; __aeabi_assert &rArr; abort &rArr; __rt_SIGABRT &rArr; __rt_SIGABRT_inner &rArr; __default_signal_display &rArr; _ttywrch
</UL>
<BR>[Calls]<UL><LI><a href="#[8d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_flag_get
<LI><a href="#[ba]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;usart_data_transmit
<LI><a href="#[b9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_bit_set
<LI><a href="#[b0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gpio_bit_reset
<LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;crc16
<LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;app_timeout_judge
<LI><a href="#[bb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;swapBytes
<LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;clean_rebuff
<LI><a href="#[77]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_assert
</UL>
<BR>[Called By]<UL><LI><a href="#[6d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[bb]"></a>swapBytes</STRONG> (Thumb, 12 bytes, Stack size 0 bytes, usart.o(i.swapBytes))
<BR><BR>[Called By]<UL><LI><a href="#[b6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;reg204
<LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;reg200
<LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;read_set_info
<LI><a href="#[b5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;read_real_info
</UL>

<P><STRONG><a name="[a6]"></a>usart_baudrate_set</STRONG> (Thumb, 136 bytes, Stack size 32 bytes, gd32f10x_usart.o(i.usart_baudrate_set))
<BR><BR>[Stack]<UL><LI>Max Depth = 124<LI>Call Chain = usart_baudrate_set &rArr; rcu_clock_freq_get
</UL>
<BR>[Calls]<UL><LI><a href="#[bd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_clock_freq_get
</UL>
<BR>[Called By]<UL><LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_eval_com_init1
</UL>

<P><STRONG><a name="[8e]"></a>usart_data_receive</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, gd32f10x_usart.o(i.usart_data_receive))
<BR><BR>[Called By]<UL><LI><a href="#[45]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART3_IRQHandler
</UL>

<P><STRONG><a name="[ba]"></a>usart_data_transmit</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, gd32f10x_usart.o(i.usart_data_transmit))
<BR><BR>[Called By]<UL><LI><a href="#[b6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;reg204
<LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;reg200
<LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;read_set_info
<LI><a href="#[b5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;read_real_info
</UL>

<P><STRONG><a name="[a5]"></a>usart_deinit</STRONG> (Thumb, 136 bytes, Stack size 8 bytes, gd32f10x_usart.o(i.usart_deinit))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = usart_deinit
</UL>
<BR>[Calls]<UL><LI><a href="#[99]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_periph_reset_enable
<LI><a href="#[9a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;rcu_periph_reset_disable
</UL>
<BR>[Called By]<UL><LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_eval_com_init1
</UL>

<P><STRONG><a name="[ae]"></a>usart_enable</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, gd32f10x_usart.o(i.usart_enable))
<BR><BR>[Called By]<UL><LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_eval_com_init1
</UL>

<P><STRONG><a name="[8d]"></a>usart_flag_get</STRONG> (Thumb, 30 bytes, Stack size 8 bytes, gd32f10x_usart.o(i.usart_flag_get))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = usart_flag_get
</UL>
<BR>[Called By]<UL><LI><a href="#[b6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;reg204
<LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;reg200
<LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;read_set_info
<LI><a href="#[b5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;read_real_info
<LI><a href="#[45]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART3_IRQHandler
</UL>

<P><STRONG><a name="[ab]"></a>usart_hardware_flow_cts_config</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, gd32f10x_usart.o(i.usart_hardware_flow_cts_config))
<BR><BR>[Called By]<UL><LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_eval_com_init1
</UL>

<P><STRONG><a name="[aa]"></a>usart_hardware_flow_rts_config</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, gd32f10x_usart.o(i.usart_hardware_flow_rts_config))
<BR><BR>[Called By]<UL><LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_eval_com_init1
</UL>

<P><STRONG><a name="[af]"></a>usart_interrupt_enable</STRONG> (Thumb, 26 bytes, Stack size 8 bytes, gd32f10x_usart.o(i.usart_interrupt_enable))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = usart_interrupt_enable
</UL>
<BR>[Called By]<UL><LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_eval_com_init1
</UL>

<P><STRONG><a name="[8f]"></a>usart_interrupt_flag_clear</STRONG> (Thumb, 26 bytes, Stack size 8 bytes, gd32f10x_usart.o(i.usart_interrupt_flag_clear))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = usart_interrupt_flag_clear
</UL>
<BR>[Called By]<UL><LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;reg200
<LI><a href="#[45]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART3_IRQHandler
</UL>

<P><STRONG><a name="[a9]"></a>usart_parity_config</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, gd32f10x_usart.o(i.usart_parity_config))
<BR><BR>[Called By]<UL><LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_eval_com_init1
</UL>

<P><STRONG><a name="[ac]"></a>usart_receive_config</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, gd32f10x_usart.o(i.usart_receive_config))
<BR><BR>[Called By]<UL><LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_eval_com_init1
</UL>

<P><STRONG><a name="[a8]"></a>usart_stop_bit_set</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, gd32f10x_usart.o(i.usart_stop_bit_set))
<BR><BR>[Called By]<UL><LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_eval_com_init1
</UL>

<P><STRONG><a name="[ad]"></a>usart_transmit_config</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, gd32f10x_usart.o(i.usart_transmit_config))
<BR><BR>[Called By]<UL><LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_eval_com_init1
</UL>

<P><STRONG><a name="[a7]"></a>usart_word_length_set</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, gd32f10x_usart.o(i.usart_word_length_set))
<BR><BR>[Called By]<UL><LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gd_eval_com_init1
</UL>
<P>
<H3>
Local Symbols
</H3>
<P><STRONG><a name="[bc]"></a>system_clock_108m_hxtal</STRONG> (Thumb, 212 bytes, Stack size 0 bytes, system_gd32f10x.o(i.system_clock_108m_hxtal))
<BR><BR>[Called By]<UL><LI><a href="#[8c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;system_clock_config
</UL>

<P><STRONG><a name="[8c]"></a>system_clock_config</STRONG> (Thumb, 8 bytes, Stack size 8 bytes, system_gd32f10x.o(i.system_clock_config))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = system_clock_config
</UL>
<BR>[Calls]<UL><LI><a href="#[bc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;system_clock_108m_hxtal
</UL>
<BR>[Called By]<UL><LI><a href="#[55]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemInit
</UL>

<P><STRONG><a name="[5a]"></a>app_can_clear_tx_queue1_first_msg</STRONG> (Thumb, 62 bytes, Stack size 8 bytes, app_can.o(i.app_can_clear_tx_queue1_first_msg))
<BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = app_can_clear_tx_queue1_first_msg &rArr; __aeabi_memclr4
</UL>
<BR>[Calls]<UL><LI><a href="#[89]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4
</UL>
<BR>[Address Reference Count : 1]<UL><LI> app_can.o(.data)
</UL>
<P><STRONG><a name="[60]"></a>app_can_clear_tx_queue2_first_msg</STRONG> (Thumb, 62 bytes, Stack size 8 bytes, app_can.o(i.app_can_clear_tx_queue2_first_msg))
<BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = app_can_clear_tx_queue2_first_msg &rArr; __aeabi_memclr4
</UL>
<BR>[Calls]<UL><LI><a href="#[89]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4
</UL>
<BR>[Address Reference Count : 1]<UL><LI> app_can.o(.data)
</UL>
<P><STRONG><a name="[5b]"></a>app_can_get_rx_queue_mes</STRONG> (Thumb, 86 bytes, Stack size 8 bytes, app_can.o(i.app_can_get_rx_queue_mes))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = app_can_get_rx_queue_mes &rArr; __aeabi_memcpy4
</UL>
<BR>[Calls]<UL><LI><a href="#[89]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4
<LI><a href="#[7b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memcpy4
</UL>
<BR>[Called By]<UL><LI><a href="#[91]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_analyse
</UL>
<BR>[Address Reference Count : 1]<UL><LI> app_can.o(.data)
</UL>
<P><STRONG><a name="[58]"></a>app_can_get_tx_queue1_mes</STRONG> (Thumb, 46 bytes, Stack size 8 bytes, app_can.o(i.app_can_get_tx_queue1_mes))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = app_can_get_tx_queue1_mes &rArr; __aeabi_memcpy4
</UL>
<BR>[Calls]<UL><LI><a href="#[7b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memcpy4
</UL>
<BR>[Address Reference Count : 1]<UL><LI> app_can.o(.data)
</UL>
<P><STRONG><a name="[5e]"></a>app_can_get_tx_queue2_mes</STRONG> (Thumb, 46 bytes, Stack size 8 bytes, app_can.o(i.app_can_get_tx_queue2_mes))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = app_can_get_tx_queue2_mes &rArr; __aeabi_memcpy4
</UL>
<BR>[Calls]<UL><LI><a href="#[7b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memcpy4
</UL>
<BR>[Address Reference Count : 1]<UL><LI> app_can.o(.data)
</UL>
<P><STRONG><a name="[5c]"></a>app_can_set_rx_queue_mes</STRONG> (Thumb, 78 bytes, Stack size 8 bytes, app_can.o(i.app_can_set_rx_queue_mes))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = app_can_set_rx_queue_mes &rArr; __aeabi_memcpy4
</UL>
<BR>[Calls]<UL><LI><a href="#[7b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memcpy4
</UL>
<BR>[Called By]<UL><LI><a href="#[51]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN1_RX0_IRQHandler
<LI><a href="#[27]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN0_RX0_IRQHandler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> app_can.o(.data)
</UL>
<P><STRONG><a name="[59]"></a>app_can_set_tx_queue1_mes</STRONG> (Thumb, 78 bytes, Stack size 8 bytes, app_can.o(i.app_can_set_tx_queue1_mes))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = app_can_set_tx_queue1_mes &rArr; __aeabi_memcpy4
</UL>
<BR>[Calls]<UL><LI><a href="#[7b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memcpy4
</UL>
<BR>[Address Reference Count : 1]<UL><LI> app_can.o(.data)
</UL>
<P><STRONG><a name="[5f]"></a>app_can_set_tx_queue2_mes</STRONG> (Thumb, 78 bytes, Stack size 8 bytes, app_can.o(i.app_can_set_tx_queue2_mes))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = app_can_set_tx_queue2_mes &rArr; __aeabi_memcpy4
</UL>
<BR>[Calls]<UL><LI><a href="#[7b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memcpy4
</UL>
<BR>[Address Reference Count : 1]<UL><LI> app_can.o(.data)
</UL>
<P><STRONG><a name="[91]"></a>can_analyse</STRONG> (Thumb, 32 bytes, Stack size 8 bytes, app_can.o(i.can_analyse))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = can_analyse &rArr; app_can_get_rx_queue_mes &rArr; __aeabi_memcpy4
</UL>
<BR>[Calls]<UL><LI><a href="#[5b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;app_can_get_rx_queue_mes
</UL>
<BR>[Called By]<UL><LI><a href="#[90]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;app_can_task_poll
</UL>

<P><STRONG><a name="[92]"></a>can_send_queue</STRONG> (Thumb, 106 bytes, Stack size 32 bytes, app_can.o(i.can_send_queue))
<BR><BR>[Stack]<UL><LI>Max Depth = 44<LI>Call Chain = can_send_queue &rArr; can_message_transmit
</UL>
<BR>[Calls]<UL><LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_message_transmit
</UL>
<BR>[Called By]<UL><LI><a href="#[90]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;app_can_task_poll
</UL>
<P>
<H3>
Undefined Global Symbols
</H3><HR></body></html>
